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The Heart of Network Digital MFPs

iR Controller Architecture

Color iR Controller Board

Color iR Controller Board

Network digital MFPs allow streamlined simultaneous multitask processing of high volumes of data for input and output procedures, including scanning, printing, faxing, and networking. The iR Controller, the heart of Canon's imageRUNNER (iR) Series, incorporates a dedicated LSI that integrates two CPUs and image-processing technologies onto a single chip. This chip, which makes possible the highly efficient processing of multiple functions, was developed by upgrading the company's System LSI Integrated Design Environment.

The Color iR Controller employed in Canon's color-model imageRUNNER MFPs handle color data, which generally contains 30 to 40 times the volume of monochrome data, and is made up of not just a CPU that controls the system, but also a graphic engine for processing all images in the same dimension, the SURF rendering engine for processing print data, and other components. The graphic engine relies on Dual Direct Mapping for high color reproduction and an error dispersion processing T-MIC for reduced graininess and superior gradation to ensure high image quality. The SURF rendering engine incorporates a parallel processing technology called pipeline architecture for significantly enhanced processing speeds.

The third-generation iR controller built into the imageRUNNER C (iR C/CLC) series incorporates ERS (Effective Resolution Systems) for the efficient processing of 1,200 dpi images, delivering high-definition output with high efficiency through simultaneous multitask processing.

Sequential processing

Sequential processing

 

Concurrent multitask processing

MFP Sequential and Concurrent Multitask Processing